Fine grain, parallel computing architectures are continuing to be studied as a means of breaking through limitations of single processor computers. The parallel computing architectures loosely imitate neural functions. One neural function performed by these so-called neural networks is pattern recognition. In neural networks, pattern recognition has been performed primarily with software-defined simulations as opposed to custom integrated circuits. This is because the massively parallel computing operations of the neural network and the large number of interconnections required for such a realization lend themselves more readily to software, rather than hardware, solutions.
Hardware implementations of neural networks cover a wide spectrum of electronic circuits from digital emulators to fully analog networks. The large interconnectivity of neural networks combine with the moderate level of precision required in the computations has sparked interest in analog hardware solutions. Analog circuits theoretically permit a much higher density of connections than corresponding digital circuits. On the other hand, digital implementations permit greater flexibility than analog circuits. They also can be designed to perform computations with arbitrary levels of precision. These attributes continue to make digital implementations of neural networks the preferred choice over analog realizations.